Publications Related to On- and Off-Chip Photonic Communications for Multi-Processor Systems

M. Bahadori, S. Rumley, D. Nikolova, K. Bergman, "Comprehensive Design Space Exploration of Silicon Photonic Interconnects," IEEE Journal of Lightwave Technology 34 (12) 2975-2987 (Nov 2015).

K. Wen, S. Rumley, J. Wilke, K. Bergman, "Latency-avoiding Dynamic Optical Circuit Prefetching Using Application-specific Predictors," First International Workshop on Communication Architectures at Extreme Scale (ExaComm) (Jul 2015).

K. Wen, S. Rumley, P. Mantovani, L. Carloni, K. Bergman, "Characterization of Accelerated 2D FFT with Off-Chip Optical Channels and Kernel Adaptation for Efficient Utilization," SEAK 2015: DAC Workshop on Suite of Embedded Applications and Kernels (Jun 2015).

D. Brunina, C. P. Lai, D. Liu, A. S. Garg, K. Bergman, "Optically-Connected Memory with Error Correction for Increased Reliability in Large-Scale Computing Systems," [Corning Outstanding Student Paper Competition Semi-Finalist] OFC 2012 OTu2B (Mar 2012).

G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, K. Bergman, "Time-division-multiplexed arbitration in silicon nanophotonic networks-on-chip for high-performance chip multiprocessors ," Journal of Parallel and Distributed Computing 71 (5) 641-650 (May 2011).

A. Biberman, K. Bergman, "Nanophotonic On-Chip Interconnection Networks for Energy-Performance Optimized Computing [invited]," SSDM 2010 D-8-1 (Sep 2010).

G. Hendry, K. Bergman, "Hybrid On-chip Data Networks [tutorial]," IEEE Symposium on High Performance Chips (Hot Chips) (Aug 2010).

G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. P. Carloni, K. Bergman, "Silicon Nanophotonic Network-On-Chip Using TDM Arbitration," IEEE Symposium on High Performance Interconnects (HOTI) 5.1 (Aug 2010).

J. Chan, G. Hendry, A. Biberman, K. Bergman, "Tools and Methodologies for Designing Energy-Efficient Photonic Networks-on-Chip for High-Performance Chip Multiprocessors [lecture/tutorial]," ISCAS 2010 paper 3336 (Jun 2010).

J. Chan, G. Hendry, A. Biberman, K. Bergman, "Architectural Design Exploration of Chip-Scale Photonic Interconnection Networks through Physical-Layer Analysis," [Corning Outstanding Student Paper Competition Semi-Finalist] OFC 2010 OThX4 (Mar 2010).

J. Chan, G. Hendry, A. Biberman, L. P. Carloni, K. Bergman, "PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks," DATE 2010 paper 06.3_3 (Mar 2010).

G. Hendry, A. Biberman, J. Chan, S. Kamil, B. G. Lee, M. Mohiyuddin, K. Bergman, L. P. Carloni, L. Oliker and J. Shalf, "Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications," NOCS 2009 (May 2009).

J. Chan, A. Biberman, B. G. Lee, K. Bergman, "Insertion Loss Analysis in a Photonic Interconnection Network for On-Chip and Off-Chip Communications," LEOS 2008 TuT3 (Nov 2008).

A. Shacham, K. Bergman, L.P. Carloni, "Photonic Networks-on-Chip for Future Generations of Chip Multi-Processors," IEEE Transactions on Computers 57 (9) 1246-1260 (Sep 2008).

M. Petracca, B. G. Lee, K. Bergman, L. P. Carloni, "Design Exploration of Optical Interconnection Networks for Chip Multiprocessors," Hot Interconnects 16 (Aug 2008).

H. Wang, M. Petracca, A. Biberman, B. G. Lee, L. P. Carloni, K. Bergman, "Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications," OFC 2008 JThA92 (Feb 2008).

H. Wang, B. G. Lee, A. Shacham, K. Bergman, "On the Design of a 4x4 Nonblocking Nanophotonic Switch for Photonic Networks on Chip," Frontiers in Nanophotonics and Plasmonics, Guaruja, SP Brazil (Nov 2007).

A. Shacham, B. G. Lee, A. Biberman, K. Bergman, L. P. Carloni, "Photonic NoC for DMA Communications in Chip Multiprocessors," Hot Interconnects 15 29-36 (Aug 2007).

A. Shacham, K. Bergman, L. P. Carloni, "The Case for Low-Power Photonic Networks-on-Chip," DAC 2007 8.5 (Jun 2007).

A. Shacham, K. Bergman, L. P. Carloni, "On the Design of a Photonic Network-on-Chip," NOCS 2007 2.1 (May 2007).

A. Shacham, K. Bergman, L. P. Carloni, "Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks," P=ac2 Conference, IBM T.J. Watson Research Center, Yorktown Heights, New York (Oct 2006).