Hybrid Memory Cubes (HMC)

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Impact of Silicon Photonic Interconnection Netowrks in HMC System Architectures


Impact of Silicon Photonic Interconnection Networks in HMC System Architectures

Computing platforms are increasingly challenged by the need to process growing volumes of data arriving in real time and at very high rates from a multiplicity of sensors. Such systems, while highly constrained in terms of energy dissipation, physical dimension, and weight, must execute critical bandwidth and communications intensive applications among a vast number of parallel resources. The ultimate performance and scalability of these computing platforms are dominated by the energy consumption costs of data movement, particularly in high bandwidth processor-memory communications. The recent emergence of high-bandwidth memory in the form of Micron's Hybrid Memory Cube (HMC) offers the first high performance memory access with current capabilities reaching 2.56Tb/s (320GB/s); however, scalability beyond a single node however is extremely challenging with conventional electronic interconnection networks.


While current designs have resigned to scaling the memory in daisy-chain deeply hierarchal architectures, a completely interconnected multi-node HMC board-scale system would require networking with >10s to 100s-Tb/s throughput bandwidths capabilities and rack scalability to Pb/s. Chip-scale optical interconnects that employ novel silicon photonics devices can potentially leapfrog the performance of traditional electronic-interconnected systems. Simply maintaining the current electronic network architecture and implementing a wire-for-wire replacement of electronic to photonic interconnects will not realize the performance gains possible with optically interconnected systems. We are investigating methods to transcend this gap via innovative system architectures with intrinsically different memory organization and data movement for applications. We exploit the unique benefits of optics for computing like distance indifference, wavelength division multiplexing (WDM), and network primitives enabled by wavelength routing and multicast.


In collaboration with Micron Technology, Inc. and University of California Information Sciences Institute (USC ISI), our work is a comprehensive effort to develop innovative compute-memory architectures and quantify the benefits of silicon photonics in a system context. The effort leverages silicon photonic devices and computing interfaces implemented by FPGAs, to develop the first end-to-end experimental system platform of an optically interconnected high-bandwidth memory in the form of Micron's Hybrid Memory Cube (HMC).


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