Integrable Interconnection Network Systems and Subsystems
Related Research
Scalable Photonic Integrated Network (SPINet)
Parametric Optical Processes and Systems (POPS)
Nanophotonic Optical Broadband Switches (NOBS)
Scalable Photonic Integrated Network (SPINet)
The miniaturization of switching elements and large-scale integration of nanophotonics gives rise to a critical challenge to the internal processing of the optical data packets while maintaining a memory-free switching fabric. We have developed a new routing approach specifically designed to accommodate the unique nano-scale integrated optical interconnection network, called SPINet (Scalable Photonic Integrated Network). SPINet is a novel optical packet switching architecture that does not employ optical buffering of any kind within its switching nodes; consequently, messages are dropped upon contention. A novel physical layer acknowledgement protocol allows for a dropped-message detection mechanism in which an optical acknowledgement (ack) pulse is sent from the receiving port upon successful transmission. SPINet leverages broadband WDM to offer high transmission bandwidths through a wavelength-striped packet format. 
A 4×4 experimental network test-bed has been implemented with complex programmable logic devices (CPLDs) and discrete components, demonstrating critical network concepts such as address encoding and decoding, correct routing and switching, and error-free transmission of high bandwidth messages in the presence of ack pulses.
The SPINet network test-bed is comprised of 2×2 SOA-based photonic switching nodes, offering wideband transmission, data transparency, and packet-rate granularity. An experimental prototype switching node verifies its performance, demonstrating an average bandwidth exceeding 40 Gb/s per port and error-free routing of 160 Gb/s peak bandwidth.
Within the scope of the SPINet network simulations and test-bed, we have introduced the concept of path diversity as a means of increasing the utilization of optical packet switched networks. The network test-bed also demonstrates a high level of flexibility and programmability, straightforwardly supporting both synchronous and asynchronous traffic as well as priority-encoded optical packets. The interoperability between the optical network test-bed and an interface buffer has demonstrated dynamic queue management and cross-layer signal communication. The SPINet OPS network test-bed has also been adapted to support a programmable high bandwidth multicasting operation with mixed data rate packets [Lai OFC 2009].
Parametric Optical Processes and Systems (POPS)
The silicon material system endows novel optical devices with exceptional performance for diverse applications ranging from short-haul optical communication links to on-chip interconnection networks. 
Its complementary metal-oxide-semiconductor (CMOS)-process compatibility enables low-cost, high-yield fabrication of monolithically integrated circuits that can combine the best of optical and electrical functionalities.
The large index contrast in silicon photonic devices enables waveguides with low bending losses and engineered dispersions, empowering a broad and flexible design space complemented with immense dispersion tunability. Leveraging this tuning capability, silicon waveguides have recently become a promising platform for ultrafast all-optical parametric processing based on four-wave mixing (FWM), supporting future transparent optical networks with data rates approaching 1 Tb/s per wavelength channel.
We have demonstrated ultra-broadband wavelength conversion in these silicon photonic waveguides at the data rates of 10 and 40 Gb/s. Using critical quantitative system-level performance metrics, we quantitatively characterized these devices. In order to further demonstrate data rate transparency and scalability of this method, we have subsequently demonstrated all-optical wavelength conversion approaching hundreds of gigabits-per-second.
Broadcasting and multicasting of optical messages, critical network processes associated with the selective dispersing of information across many nodes, have traditionally been performed in the electronic domain using power-hungry optical-electronic-optical (O-E-O) conversion—as the data rate increases, the energy consumed by the serializers and deserializers alone quickly becomes the energy dissipation bottleneck in these systems. We have presented for the first time the use of FWM for all-optical wavelength multicasting on-chip in the silicon platform using the same dispersion-engineered silicon photonic waveguides. The all-optical processes using this inherently optically-transparent method are scalable both in multicast number and data rate.
Nanophotonic Optical Broadband Switches (NOBS)
This work continues along similar lines of the previous sections covering SPINet and POPS with the focus of using integrated optical systems to provide connectivity between many users. Here, though, the users envisioned are board-level elements that would be found in a typical computer system, such as processors, memory banks, or I/O devices. The goal of the project is to develop an integrated photonic switching system that delivers high-bandwidths to a large number of these users, and can be switched at sufficiently high speeds (nanosecond-scale) to facilitate message exchange in a very dynamic system where communication patterns are constantly changing.
Utilizing the functionality of many of the silicon photonic components explored through other research by our group, a wide variety of complex switching systems can be envisioned, which can each be integrated on a single chip providing connectivity to the local computational elements. Due to the large design space for such a system, it is important to compare both network and physical layer performances among the many alternatives. Therefore, we have developed a simulation environment which can monitor network performance (e.g. latency and throughput) for varying traffic patterns and user configurations, while also aggregating the physical-layer metrics (e.g. insertion loss, crosstalk, and power consumption) of the system in order to obtain the full view of how the system behaves. Such a simulation environment provides (1) a pre-fabrication performance comparison between competing designs, (2) perspective on how physical device improvements enhance system performance or similarly what device performance is required in order to achieve the desired level of system performance, and (3) an abstraction (similar to electronic CAD tools) of rigorous physical-layer modeling algorithms, which enables the investigations of more complex systems.
The image above represents a snapshot of the video to the left. In the image, a number of the 1×2 switches, 2×2 switches, waveguide crossings, and bends are arranged in the simulator to form the 4×4 non-blocking photonic router. The video depicts a brief demonstration of the simulator, which was implemented on the OMNeT++ platform. We develop the photonic device models in a hierarchical manner that allows us to describe in high detail several basic building blocks, and from these to construct larger functional components and even entire large-scale topologies. The animation begins by demonstrating the message transmission protocol on a photonic torus network. The left window shows the photonic plane and the right window shows the electronic control plane. We first see a message being transmitted along an electronic path which constitutes a path-setup, and subsequently data transmission occurs on the photonic plane. Near 45 seconds into the animation, the multi-level design methodology that our simulator leverages is illustrated when a user opens a single tile in the photonic network. Next, one of the 4×4 switches found within the tile is opened, and finally the viewer gets to peer into one of the basic building blocks that is explicitly programmed within the simulation. It is at this level that the physical device parameters may be altered.